from .relys import BitSet
from .relys import Chip

class Register(Chip):
    def __init__(self, width):
        super().__init__(width*2+4, [0,width+4], [width+4,width*2+4])
        self.RST = self.pinIN@[0]
        self.CLK = self.pinIN@[1]
        self.EI  = self.pinIN@[2]
        self.EO  = self.pinIN@[3]
        self.DAT = self.pinIN@[4, width+4]
        self._dat = BitSet(width)

@Register.keyframe(0)
def _frame(chip):
    if chip.RST() : 
        chip._dat(0)
        chip.pinOUT(0)
        return None
    else : return chip

@Register.keyframe(1)
def _frame(chip):
    if chip.EO() : chip.pinOUT(chip._dat())
    else : chip.pinOUT(0)
    return chip

@Register.keyframe(2)
def _frame(chip):
    if chip.CLK() & chip.EI() : chip._dat(chip.DAT())
    return None

# module test
if __name__ == "__main__":
    reg = Register(8)
    reg._dat(127)
    reg.CLK(1)
    reg.EI(1)
    reg.EO(1)
    reg.DAT(0b01010101)
    for i in range(Register.maxframe+1):
        reg.update(i)
        print(f"<frame>:[{i}]", reg)
 